Enhancing Semiconductor Functional Verification with Deep Learning with Innovation and Challenges

Abstract

Purpose: Universally, the semiconductor is the foundation of electronic technology used in an extensive range of applications such as computers, televisions, smartphones, etc. It is utilized to create ICs (Integrated Circuits), one of the vital electronic device components. The Functional verification of semiconductors is significant to analyze the correctness of an IC for appropriate applications. Besides, Functional verification supports the manufacturers in various factors such as quality assurance, performance optimization, etc. Traditionally, semiconductor Functional verification is carried out manually with the support of expertise. However, it is prone to human error, inaccurate, expensive and time-consuming. To resolve the problem, DL (Deep Learning) based technologies have revolutionized the functional verification of semiconductor device. The utilization of various DL algorithms automates the semiconductor Functional verification to improve the semiconductor quality and performance. Therefore, the focus of this study is to explore the advancements in the functional verification process within the semiconductor industry.

Methodology: It begins by examining research techniques used to analyse existing studies on semiconductors. Additionally, it highlights the manual limitations of semiconductor functional verification and the need for DL-based solutions.

Findings: The study also identifies and discusses the challenges of integrating DL into semiconductor functional verification. Furthermore, it outlines future directions to improve the effectiveness of semiconductor functional verification and support research efforts in this area. The analysis reveals that there is a limited amount of research on deep learning-based functional verification, which necessitates further enhancement to improve the efficiency of functional verification.

Unique contribution to theory, policy and practice: The presented review is intended to support the research in enhancing the efficiency of the semiconductor functional verification. Furthermore, it is envisioned to assist the semiconductor manufacturers in the field of functional verification regarding efficient verifications, yield enhancement, improved accuracy, etc.